Senior SerDes System Validation Engineer

Company: Apple Inc.
Location: San Diego
Posted on: January 29, 2025

Job Description:

Senior SerDes System Validation EngineerLead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within the Analog-Mixed/Signal design team and participate in the validation and debug of embedded circuits; collaborating with many disciplines to enable the world's premier products. You will closely work with a talented group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest expectations of quality, innovation, and efficiency.At Apple, we work every single day to craft products that enrich people's lives. If you have strong fundamentals and a track record of tackling technical challenges, are inspired by your curiosity and eagerness to learn new skills, and care about society while demonstrating leadership skills, we have an opportunity for a forward-thinking and hardworking system validation engineer with a strong background in high-speed serial links.The ideal candidate should have experience in high-speed serial links with expertise in the following:

• Very knowledgeable about and experienced with common high-speed SerDes protocols (e.g., PCIe, USB, UCIe, OIF, etc.)
• Very knowledgeable in system bring-up of high-speed serial links, lab testing, and defining equipment needs
• Very knowledgeable in scripting (e.g., Python, C, Matlab) for automation of validation efforts. Experience with system-level S/W setup is a plus
• Experience in mixed-signal circuit pre-silicon verification and ability to closely work with the circuit design team
• Knowledge of DFT to aid in the system validation
• Experience in leading mixed-signal SerDes system validation
• Experience with silicon bring-up, debug, and production ramp
• Knowledge of SerDes design and architecture including CDR and equalization
• Knowledge of Tx/Rx equalization techniques and adaptation
• Knowledge of link jitter budget for high-speed serial links and key block-level requirements
• Knowledge of ADC-based links and equalization techniques
• Familiarity with PCB design and specifications
• Strong communication, teamwork, and problem-solving skills
• Proven track record of delivering under difficult debug and validation scenariosExperience in the following areas is desirable:
• Able to think outside of the box and come up with creative solutions for system validation
• Knowledge of system-level considerations e.g., ESD requirementsMinimum Qualifications:

• MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience.Preferred Qualifications:
  • Ownership of SerDes system bring-up, validation, and debug. This will involve a SerDes bring-up in the system environment, verifying basic operations, analyzing robustness, and margins in the system.
  • Work with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success.
  • Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher-level control logic.At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $166,600 and $296,300, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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Keywords: Apple Inc., Temecula , Senior SerDes System Validation Engineer, Other , San Diego, California